Co-Design Considerations for Frequency Drift Compensation in BAW-based Time Reference Application

被引：0

作者：

Razafimandimby, S. ^{[1
]}

Petit, D. ^{[1
]}

Bar, P. ^{[1
]}

Joblot, S. ^{[1
]}

Carpentier, J. -F. ^{[1
]}

Morelle, J. ^{[1
]}

Arnaud, C. ^{[1
]}

Parat, G. ^{[2
]}

Garcia, P. ^{[1
]}

Garnier, C. ^{[1
]}

机构：

[1] STMicroelect, Crolles, France

[2] CEA LETI, MINATEC, Grenoble, France

来源：

2010 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS RFIC SYMPOSIUM | 2010年

关键词：

Time reference; SMR; BAW; low phase noise; thermal stability; frequency accuracy;

D O I：

10.1109/RFIC.2010.5477303

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In order to take up the challenge of BAW-based time reference, this paper presents new BAW/Integrated Circuits (IC) co-integration considerations. For the demonstration, a SiP approach is proposed where the Solidly Mounted Resonator (SMR) has been directly flip-chipped on the top of the IC. This 2.5GHz oscillator reaches a -93dBc/Hz phase noise at a 2kHz carrier offset for a 7.3mW power consumption. A 5bit switched capacitor bank permits to correct process deviations with a 12.5kHz accuracy while a varactor capacitance allows compensating a SMR with a -4.2ppm/degrees C Temperature Coefficient of Frequency (TCF) in a [-40 degrees C,85 degrees C] temperature range.

引用

页码：249 / 252

页数：4

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