Low-Power CMOS LNA for 900-MHz LoRa Application Through Parallel-RC Feedback

被引:0
|
作者
Shiau, Cheng-Shian [1 ]
Yang, Jeng-Rern [1 ]
机构
[1] Yuan Ze Univ, Dept Commun Engn, Taoyuan, Taiwan
关键词
Low power; LNA; Parallel-RC Feedback;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a two-stage design of a parallel-RC feedback low-power low-noise amplifier (LNA) that can be used in long-range (LoRa) applications is presented. The first stage involes a common-source amplifier intended to decouple the noise figure (NF). To obtain broadband input matching, a parallel resistance capacitance shunt feedback is proposed. Furthermore, a source inductance is used to boost the range of adjustments between the gain and noise circle. The second stage involves achieving a higher gain with a cascade architecture.The gain(S21), output return loss(S22), and NF of the LNA were 17.5 dB,-23.3 dB, and 2.6 dB. The power dissipation is 7.2mW. The LNA was simulated in the Advanced Design System (ADS) software and fabricated using a TSMC 1P6M 0.18um CMOS process.
引用
收藏
页码:28 / 29
页数:2
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