On-chip array of thermoelectric Peltier microcoolers

被引：0

作者：

Goncalves, L. M. ^{[1
]}

Rocha, J. G. ^{[1
]}

Couto, C. ^{[1
]}

Alpuim, P. ^{[2
]}

Correia, J. H. ^{[1
]}

机构：

[1] Univ Minho, Dept Ind Elect, Guimaraes, Portugal

[2] Univ Minho, Dept Phys, Guimaraes, Portugal

来源：

TRANSDUCERS '07 & EUROSENSORS XXI, DIGEST OF TECHNICAL PAPERS, VOLS 1 AND 2 | 2007年

关键词：

telluride peltier microcooler array;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This article reports on the theoretical modelling, the Finite Element Modelling (FEM) simulation, the fabrication process and preliminary results of the first on-chip thermoelectric microcooler array (64 pixels arranged in a 8x8 array), with each pixel independently controlled. This microcooler array uses co-evaporated V-VI compounds of Bi2Te3 and Sb2Te3 as thermoelectric layers, and can be fabricated using planar thin-film technology, lithography and wet etching on top of a silicon wafer, where the CMOS electronic circuits were previously made.

引用

页数：2

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