Fabrication of 4H-SiC PiN diodes without bipolar degradation by improved device processes

We developed a simple technology for fabricating bipolar degradation-free 6.5 kV SiC PiN diodes on the basal plane dislocation (BPD)-free areas of commercially available 4H-SiC wafers. In order to suppress process-induced basal plane dislocation, we first investigated the causes of BPD generation during fabrication and then improved the processes. We found that no BPD was induced on a flat Si-face, but a large number of BPDs were concentrated in the mesa edge after high-dose Al ions were implanted [p(++) ion implantation (I. I.)] at room temperature (RT) followed by activation annealing. Therefore, we examined new technologies in device processes including (I) long-term high-temperature oxidation after the mesa process to remove etching damage in the mesa edge and (II) reducing the Al dose (p(+) I. I.) in the mesa edge to suppress BPD generation. We investigated the effect of the Al dose in the mesa edge on BPD generation and bipolar degradation. The results indicated that no BPD appeared when the dose was lower than 1 x 10(15) atoms/cm(2) and when long-term high-temperature oxidation was applied after the mesa process. As a result, we successfully fabricated 6.5 kV PiN diodes without bipolar degradation on BPD-free areas. Moreover, the diodes are very stable when applying 270 A/cm(2) for over 100 h. Photoluminescence (PL) observation indicated that no BPD was generated during the improved fabrication processes. Besides, the I-r-V-r measurements showed that the breakdown voltage was over 8 kV at RT. The leakage currents are as low as 7.6 x 10(-5) mA/cm(2) (25 degrees C) and 6.3 x 10(-4) mA/cm(2) (150 degrees C) at 6.5 kV. Moreover, this result is applicable not only for PiN diodes but also for MOSFETs (body diode), IGBTs, thyristors, etc. Published by AIP Publishing.