DC-link Voltage Design of High-Bandwidth Motor Emulator for Interior Permanent-Magnet Synchronous Motors

被引:0
|
作者
Lee, Yoon-Ro [1 ]
Kwon, Yong-Cheol [1 ]
Sul, Seung-Ki [1 ]
机构
[1] Seoul Natl Univ, Dept Elect & Comp Engn, Seoul, South Korea
关键词
Power hardware in the loop (PHIL); motor emulator; DC-link voltage design; motor modeling; flux weakening;
D O I
暂无
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
This paper proposes DC-link voltage design rules of a motor emulator (ME) for interior permanent-magnet synchronous motors (IPMSMs). The design rules are useful for the optimization of ME's ratings, which can significantly affect the cost of the whole system. For the DC-link voltage design, this paper considers not only conventional MEs that emulate only fundamental current, but also high-bandwidth motor emulator (HBME) which can emulate the current in the whole frequency range from DC to the switching frequency of the inverter under test. Through appropriate approximations, design guidelines for ME DC-link voltage are provided. Simulation and experimental results are presented with a 3.6 kW 8-pole 12-slot IPMSM model to verify the validity and effectiveness of the proposed design rule.
引用
收藏
页码:4453 / 4459
页数:7
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