Scalable 3D Silicon Optical Switch Based on CLOS Architecture

被引:2
|
作者
Yin, Yuexin [1 ]
Sun, Chunlei [2 ,3 ]
Ding, Yingzhi [1 ]
Xu, Xinru [1 ]
Yao, Mengke [1 ]
Li, Lan [2 ,3 ]
Lin, Hongtao [4 ]
Zhang, Daming [1 ]
机构
[1] Jilin Univ, Coll Elect Sci & Engn, State Key Lab Integrated Optoelect, Changchun 130012, Peoples R China
[2] Westlake Univ, Sch Engn, Key Lab 3D Micro Nano Fabricat & Characteerizat Z, Hangzhou 310024, Peoples R China
[3] Westlake Inst Adv Study, Inst Adv Technol, Hangzhou 310024, Peoples R China
[4] Zhejiang Univ, Coll Informat Sci & Elect Engn, State Key Lab Modern Opt Instrumentat, Hangzhou 310027, Peoples R China
来源
IEEE PHOTONICS JOURNAL | 2022年 / 14卷 / 04期
基金
中国国家自然科学基金;
关键词
Optical switches; Three-dimensional displays; Topology; Network topology; Nonhomogeneous media; Silicon; Optical device fabrication; 3D integration; optical interconnect; optical switches; photonic integrated circuits; silicon photonics; PHOTONIC SWITCHES; PLATFORM; COMPACT;
D O I
10.1109/JPHOT.2022.3195893
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
To achieve complex functionality with small size, weight and power, photonic integrated circuits (PIC) are expanded from two-dimensional (2D) to three-dimensional (3D). In this paper, a new design for a scalable 3D silicon optical switch is proposed. Key elements, including silicon electro-optic switches, crossings, and interlayer transitions are used to define and optimize the 3D optical switching network. The architecture is based on CLOS architecture, which can be extended to multiple layers. Silicon-based two- and three-layer switches are carefully designed and analyzed as an example based on the transfer matrix technique (TMT). In a 4x4 two-layer optical switch, the average insertion loss at 1550 nm wavelength is similar to 4.16 dB, and similar to 3.69 dB for the "all-cross" and "all-bar" states, respectively. In a 4x4 three-layer optical switch, the average insertion loss at 1550 nm wavelength is similar to 5.96 dB, and similar to 5.41 dB for the "all-cross" and "all-bar" states, respectively. The architecture also shows the scalability of both the port number and the layer number. The scalable 3D architecture proposed could improve the interconnect density twice and thrice in a single-layer design.
引用
收藏
页数:9
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