Dual-rail multiple-valued current-mode VLSI with biasing current sources

被引：5
|
作者：
Ike, T [1 ]
Hanyu, T [1 ]
Kameyama, M [1 ]
机构：
[1] Tohoku Univ, Grad Sch Informat Sci, Dept Math & Comp Sci, Sendai, Miyagi 9808579, Japan
来源：
31ST INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC, PROCEEDINGS | 2001年
关键词：
D O I：
10.1109/ISMVL.2001.924550
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
A new current mirror with a biasing current source is proposed for high-performance arithmetic VLSI systems. The delay for the current mirror is inversely proportional to the input current. The use of a biasing current source makes the input current of the current mirror increased, which results in smaller switching delay. As a typical example of the proposed dual-rail multiple-valued current mode (MVCM) circuit, a radix-2 signed-digit full adder is designed by using a 0.35-mum CMOS technology. Its performance is superior to that of corresponding MVCM circuits without biasing current sources.
引用
收藏
页码：21 / 26
页数：6
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