An analytical model for thermal stress analysis of multi-layered microelectronic packaging

被引:52
|
作者
Wen, YJ [1 ]
Basaran, C [1 ]
机构
[1] SUNY Buffalo, Elect Packaging Lab, Dept Civil Struct & Environm Engn, Buffalo, NY 14260 USA
基金
美国国家科学基金会;
关键词
microelectronic packaging; interfacial stress; multi-layered structure; interfacial delamination; Moire interferometry;
D O I
10.1016/S0167-6636(03)00076-0
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Compared to numerical methods, analytical solutions can offer a faster and more accurate procedure for obtaining the interfacial stresses in laminated structures. An analytical model for thermal stress analysis of multi-layered thin stacks on a thick substrate under isothermal loading is proposed in this paper. This analytical approach considers each layer as a beam-type plate with orthotropic material properties. Highly sensitive Moire interferometry is used to validate the model. The strain field in the bi-material interfaces is obtained experimentally. The test data is in good agreement with the proposed analytical solution. Finite element analysis results are also compared with the analytical solution and the test data. (C) 2003 Elsevier Ltd. All rights reserved.
引用
收藏
页码:369 / 385
页数:17
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