Critical Packet Prioritisation by Slack-Aware Re-routing in On-Chip Networks

被引:0
|
作者
Das, Abhijit [1 ]
Babu, Sarath [2 ]
Jose, John [1 ]
Jose, Sangeetha [2 ]
Palesi, Maurizio [3 ]
机构
[1] Indian Inst Technol Guwahati, Dept Comp Sci & Engn, Gauhati, India
[2] Govt Engn Coll, Dept Informat Technol, Idukki, India
[3] Univ Catania, Dept Elect Elect & Comp Engn, Catania, Italy
来源
2018 TWELFTH IEEE/ACM INTERNATIONAL SYMPOSIUM ON NETWORKS-ON-CHIP (NOCS) | 2018年
关键词
Quality-of-Service (QoS); slack estimation; adaptive routing; input selection; stall time reduction;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Packet based Network-on-Chip (NoC) connect tens to hundreds of components in a multi-core system. The routing and arbitration policies employed in traditional NoCs treat all application packets equally. However, some packets are critical as they stall application execution whereas others are not. We differentiate packets based on a metric called slack that captures a packet's criticality. We observe that majority of NoC packets generated by standard application based benchmarks do not have slack and hence are critical. Prioritising these critical packets during routing and arbitration will reduce application stall and improve performance. We study the diversity and interference of packets to propose a policy that prioritises critical packets in NoC. This paper presents a slack-aware re-routing (SAR) technique that prioritises lower slack packets over higher slack packets and explores alternate minimal path when two no-slack packets compete for same output port. Experimental evaluation on a 64-core Tiled Chip Multi-Processor (TCMP) with 8x8 2D mesh NoC using both multiprogrammed and multithreaded workloads show that our proposed policy reduces application stall time by upto 22% over traditional round-robin policy and 18% over state-of-the-art slack-aware policy.
引用
收藏
页数:8
相关论文
共 50 条
  • [31] A Framework for Energy-Aware Routing in Packet Networks
    Gelenbe, Erol
    Morfopoulou, Christina
    COMPUTER JOURNAL, 2011, 54 (06): : 850 - 859
  • [32] Re-routing with ant colony optimization for information-centric networks
    Tanaka, Tsuyoshi
    Nishitsuji, Takashi
    Asaka, Takuya
    IEICE COMMUNICATIONS EXPRESS, 2022, 11 (02): : 70 - 74
  • [33] An adaptive algorithm for fault tolerant re-routing in wireless sensor networks
    Gregoire, Michael
    Koren, Israel
    FIFTH ANNUAL IEEE INTERNATIONAL CONFERENCE ON PERVASIVE COMPUTING AND COMMUNICATIONS WORKSHOPS, PROCEEDINGS, 2007, : 542 - +
  • [34] Bimodal packet aware scheduling for an OFDMA based on-chip RF interconnect
    Unlu, Eren
    Moy, Christophe
    JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING, 2017, 109 : 15 - 28
  • [35] Adaptable switch boxes as on-chip routing nodes for networks-on-chip
    Eickhoff, R
    Niemann, JC
    Porrmann, M
    Rückert, U
    From Specification to Embedded Systems Application, 2005, 184 : 201 - 210
  • [36] Oblivious Routing in On-Chip Bandwidth-Adaptive Networks
    Cho, Myong Hyon
    Lis, Mieszko
    Shim, Keun Sup
    Kinsy, Michel
    Wen, Tina
    Devadas, Srinivas
    18TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, PROCEEDINGS, 2009, : 181 - 190
  • [37] Design and impelementation of a routing switch for on-chip interconnection networks
    Chi, HC
    Chen, JH
    PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS, 2004, : 392 - 395
  • [38] Application-Aware Topology Reconfiguration for On-Chip Networks
    Modarressi, Mehdi
    Tavakkol, Arash
    Sarbazi-Azad, Hamid
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 19 (11) : 2010 - 2022
  • [39] Multicast-Aware Mapping Algorithm for on-Chip Networks
    Habibi, Amirali
    Arjomand, Mouhammad
    Sarbazi-Azad, Hamid
    PROCEEDINGS OF THE 19TH INTERNATIONAL EUROMICRO CONFERENCE ON PARALLEL, DISTRIBUTED, AND NETWORK-BASED PROCESSING, 2011, : 455 - 462
  • [40] Traffic-Aware Buffer Reconfiguration in on-Chip Networks
    Bashizade, Ramin
    Sarbazi-Azad, Hamid
    2015 IFIP/IEEE INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2015, : 201 - 206