LUT-Based power macromodeling technique for DSP architectures

被引:0
|
作者
Durrani, Yaseer A. [1 ]
Riesgo, Teresa [1 ]
机构
[1] Univ Politecn Madrid, ETSI Industriales, Ctr Elect Ind, E-28006 Madrid, Spain
关键词
D O I
10.1109/ICECS.2007.4511265
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we present a look-up-table (LUT) based power macromodeling technique for digital signal processing (DSP) architecture in terms of the statistical knowledge of their primary inputs. During the power estimation procedure, the sequence of an input stream is generated by a genetic algorithm using input metrics. Then, a Monte Carlo zero-delay simulation is performed and a power dissipation macromodel function is built from power dissipation results. From then on, this macromodel function can be used to estimate power dissipation of the system just by using the statistics of the macro-block's primary inputs. In experiments with the DSP system, the average error is 31.23%.
引用
收藏
页码:1416 / 1419
页数:4
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