Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in 2-D Architecture and Its Application to Large-Scale Circuits

In this paper, we propose an exact method of directly synthesizing a nearest neighbor compliant (NNC) quantum circuit with the smallest depth in 2-D architecture, given a reversible function. Our method maps the synthesis problem to a Boolean satisfiability (SAT) problem and uses a satisfiability modulo theories (SMT) solver to find an assignment of a network of allowed quantum gates. Since an SMT solver performs an exhaustive search, it can be ensured that on a specific qubit placement, the NNC quantum circuit synthesized by our method has the smallest number of quantum gates. However, the exhaustive search also makes our exact method not scale well. For that reason, we propose another method of applying our exact method in the local synthesis of large-scale circuits, to in parallel synthesize sub-NNC quantum circuits. From the experimental results, the quantum costs of the NNC quantum circuits synthesized by our methods are reduced by an average of 23.89%, when compared to an optimal heuristic method which determines the smallest number of SWAP gates in 2-D architecture.