Design methodology for CMOS distributed amplifiers

被引：4
|
作者：
Green, Michael M. [1 ]
Pisani, Marcelo B. [2 ]
Dehollain, Catherine [3 ]
机构：
[1] Univ Calif Irvine, Dept EECS, Irvine, CA 92697 USA
[2] Univ Pennsylvania, Elect & Syst Engn, Philadelphia, PA 19104 USA
[3] Ecole Polytech Fed Lausanne, Elect Lab, CH-1015 Lausanne, Switzerland
来源：
PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10 | 2008年
关键词：
D O I：
10.1109/ISCAS.2008.4541521
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The design of distributed amplifiers in a CMOS process is investigated. In particular, the impact of parasitic elements from the transistors and from interstage inductors is studied. A methodology for determining an optimum design, including the number of stages, without needing a complete inductor model at the outset, is presented. This proposed methodology reduces the time and complexity of a distributed amplifier design while at the same time allowing the designer to gain more insight into the circuit's behavior.
引用
收藏
页码：728 / +
页数：2
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