MAESTRO: A Data-Centric Approach to Understand Reuse, Performance, and Hardware Cost of DNN Mappings

被引:93
|
作者
Kwon, Hyoukjun [1 ]
Chatarasi, Prasanth [1 ]
Sarkar, Vivek [1 ]
Krishna, Tushar [1 ]
Pellauer, Michael [2 ]
Parashar, Angshuman [2 ]
机构
[1] Georgia Tech, Atlanta, GA 30332 USA
[2] NVIDIA Corp, Santa Clara, CA USA
基金
美国国家科学基金会;
关键词
Single-photon avalanche diodes; Hardware; Indexes; Arrays; Analytical models; Estimation; Buffer storage; Deep neural networks; Spatial accelerators; Dataflow; Cost modeling;
D O I
10.1109/MM.2020.2985963
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The efficiency of an accelerator depends on three factors-mapping, deep neural network (DNN) layers, and hardware-constructing extremely complicated design space of DNN accelerators. To demystify such complicated design space and guide the DNN accelerator design for better efficiency, we propose an analytical cost model, MAESTRO. MAESTRO receives DNN model description and hardware resources information as a list, and mapping described in a data-centric representation we propose as inputs. The data-centric representation consists of three directives that enable concise description of mappings in a compiler-friendly form. MAESTRO analyzes various forms of data reuse in an accelerator based on inputs quickly and generates more than 20 statistics including total latency, energy, throughput, etc., as outputs. MAESTRO's fast analysis enables various optimization tools for DNN accelerators such as hardware design exploration tool we present as an example.
引用
收藏
页码:20 / 29
页数:10
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