Process Proximity Correction using an automated software tool

The pattern transfer process from the chip layout data to the structures on the finished wafer consists of many process steps. Although desired, none of these steps is linear in all aspects of the pattern transfer. Approaching the process limits due to the ever-shrinking linewidth, the non-linearities of the pattern transfer clearly show up. This means, that one cannot continue the practice to summarize all process influences into one bias between the data used for mask making and the final chip structure. The correction of process non-linearities is a necessity. This correction is usually called optical proximity correction (OPC), although not all effects intended for correction are of optical origin and/or not all these are effects of the neighborhood. We therefore propose to use the term PPC (process proximity correction). This paper reports our experiences with the application of OPTISSIMO, a software tool developed to perform automatically OPC/PPC for full chip designs. First, we provide a definition of PPC, which in our view has to correct all non-linearities of the pattern transfer process from layout data to the final electrically measured structures. Then, the strategy of the OPC/PPC tool OPTISSIMO, a software package to perform PPC based on process simulation, is discussed. We focus on the data handling strategy and on the process modeling of the tool under evaluation. It is shown, that full chip OPC/PPC is practicable using a well-designed hierarchy management system combined with a pattern library. Finally, it is demonstrated, that a model-based OPC/PPC tool is by definition a process simulation tool, that is able to perform all simulation tasks (like defect printability) at reasonable accuracy.