Design of a 5.7 GHz 0.18 μm CMOS current-reused LNA for an 802.11a WLAN receiver

被引:0
|
作者
Li, LH [1 ]
Chuang, HR [1 ]
机构
[1] Natl Chung Cheng Univ, Dept Elect Engn, Tainan, Taiwan
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article presents the design, implementation and measurement of a 5.7 GHz CMOS LNA for an IEEE 802.11a WLAN receiver The LNA, fabricated with the 0.18 mum 1P6M standard CMOS process, uses a current-reuse technology to increase linear gain and save power consumption. The circuit measurements are performed using an FR-4 PCB test fixture. The fabricated LNA exhibits a linear gain of 11.2 dB, a noise figure of 4.5 dB and an input P1dB of -10 dBm at 5.8 GHz. The power consumption is 14.4 mW at V-DD = 1.8 V.
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页码:132 / 136
页数:5
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