A 110-MHz 84-dB CMOS programmable gain amplifier with integrated RSSI function

被引:53
|
作者
Wu, CP [1 ]
Tsao, HW
机构
[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan
[2] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 10617, Taiwan
关键词
CMOS analog integrated circuits; CMOS RF transceiver integrated circuits; gain-programming logic; intermediate-frequency amplifiers; IF amplifier; programmable gain amplifier; received signal strength indicator (RSSI);
D O I
10.1109/JSSC.2005.848023
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes a CMOS programmable gain amplifier (PGA) that maintains a 3-dB bandwidth greater than 110 MHz and can provide an 84-dB gain control range with 1-dB step resolution. The PGA can also be operated in a low-power mode with 3-dB bandwidth greater than 71 MHz. Integrated with this PGA is a CMOS successive logarithmic detecting amplifier with a +/- 0.7-dB logarithmic accuracy over an 80-dB dynamic range. It achieves -83-dBm sensitivity and consumes 13 mA from a single 3-V supply in the normal power mode. The chip area, including pads, occupies 1.5 x 1.5 mm(2).
引用
收藏
页码:1249 / 1258
页数:10
相关论文
共 50 条
  • [31] A 40dB, 100MHz CMOS IF variable gain amplifier for DVB-C receivers
    Yun, TH
    Yin, L
    Tang, SL
    Wu, JH
    [J]. 2005 6TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, BOOKS 1 AND 2, 2005, : 508 - 511
  • [32] A 450MHz 14dB Variable Gain Amplifier in 0.35um CMOS process
    Hosseini, Maryam
    Hadidi, Khairollah
    Khoei, Abdollah
    [J]. 2015 23RD IRANIAN CONFERENCE ON ELECTRICAL ENGINEERING (ICEE), 2015, : 1215 - 1219
  • [33] Low-voltage low-power 100 MHz programmable gain amplifier in 0.35 μm CMOS
    Calvo, B.
    Celma, S.
    Sanz, M. T.
    [J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2006, 48 (03) : 263 - 266
  • [34] Low-voltage low-power 100 MHz programmable gain amplifier in 0.35 μm CMOS
    B. Calvo
    S. Celma
    M. T. Sanz
    [J]. Analog Integrated Circuits and Signal Processing, 2006, 48 : 263 - 266
  • [35] A 50-MHz dB-linear programmable-gain amplifier with 98-dB dynamic range and 2-dB gain steps for 3 V power supply
    Nah, KS
    Park, BH
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2003, 11 (02) : 218 - 223
  • [36] A Digitally Programmable 50-150dB DC Gain Operational Transconductance Amplifier in 130nm CMOS
    Yang, Ming
    Roberts, Gordon W.
    [J]. 2016 14TH IEEE INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2016,
  • [37] A PROGRAMMABLE 1.5 V CMOS CLASS-AB OPERATIONAL-AMPLIFIER WITH HYBRID NESTED MILLER COMPENSATION FOR 120-DB GAIN AND 6-MHZ-UGF
    ESCHAUZIER, RGH
    HOGERVORST, R
    HUIJSING, JH
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1994, 29 (12) : 1497 - 1504
  • [38] A 380-MHz CMOS linear-in-dB signal-summing variable gain amplifier with gain compensation techniques for CDMA systems
    Watanabe, O
    Otaka, S
    Ashida, I
    Itakura, T
    [J]. 2002 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2002, : 136 - 139
  • [39] A 50-MHz 98-dB dynamic-range dB-linear programmable-gain amplifier with 2-dB gain steps for 3-V power supply
    Nah, KS
    Park, BH
    [J]. 2001 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2001, : 73 - 76
  • [40] A 1-V 120-MHz FD-SOI CMOS linear-in-dB variable gain amplifier
    Cha, Sungwoo
    Shimizu, Yoshiyuki
    Kim, Guechol
    Matsuoka, Toshimasa
    Taniguchi, Kenji
    [J]. IEICE ELECTRONICS EXPRESS, 2005, 2 (07): : 249 - 253