FPGA Implementation of MIMO-OFDM Transceiver

被引:0
|
作者
Srinandhini, K. [1 ]
Vaithianathan, V. [1 ]
机构
[1] Sri Sivasubramaniya Nadar Coll Engn, Dept ECE, Chennai, Tamil Nadu, India
关键词
Interleaver; MIMO; OFDM; SoC;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Orthogonal Frequency Division Multiplexing (OFDM) which is a FDM modulation is a promising methodology for high data rate applications like video streaming. This methodology works effectively for multipath frequency selective channels. Multiple Input and Multiple Output (MIMO) is a wireless technology that uses multiple antennas at the transceiver ends. It increases link throughput and network capacity. The combination of both MIMO and OFDM provides a system that is robust against the frequency-selective fading caused by sever multi-path scattering and narrowband interference. This ongoing evaluation has accelerated the development of System-on-chip (SoC) platform to support the physical layer of these technologies. In this paper, Field Programmable Gate Array (FPGA) implementation of channel coder, its decoder, interleaver and deinterleaver of MIMO-OFDM are discussed. Convolutional encoder of code rate 1/2 is used because of its less complexity and Viterbi decoder is used for decoding. Interleaver and Deinterleaver is used to remove the burst error thus improving the performance.
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页数:5
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