Temperature-Dependent Threshold Stability of COTS SiC MOSFETs During Gate Switching

Commercial SiC DMOSFETs were stressed at high temperatures by applying a switching bias waveform to the gate, at a frequency around 10 kHz (similar to what a standard gate driver would do in a typical operating environment). Threshold voltage was monitored in situ (without interruption of the waveform) using a fast I-D-V-GS measurement during the pulse transitions. These measurements reveal significantly more drift in the threshold than can be seen by standard parameter analyzer-based methods. A decrease in, and reversal of, the threshold voltage hysteresis at higher temperatures was observed which cannot be explained by oxide trap charging alone. Degradation in threshold voltage hysteresis was found to proceed in an Arrhenius-like manner with an activation energy of 1.2 eV. Post-stress room temperature measurements using fast I-D-V-GS reveal a permanent degradation that slow methods do not detect.