A new architecture for high-performance Programmable Logic Controller

被引:0
|
作者
Aramaki, N [1 ]
Shimokawa, Y [1 ]
Kuno, S [1 ]
Saitoh, T [1 ]
Hashimoto, H [1 ]
机构
[1] Toshiba Corp, Heavy Apparatus Engn Lab, Fuchu, Tokyo 183, Japan
关键词
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
We developed an economical Programmable Logic Controller(PLC) with high efficiency suitable for plant control systems. This PLC compose of several card with function. The main processor card determine the efficiency of a PLC, Therefore PLC's efficiency can be improved by upgrading the main processor card. Also,the main processor card and another card occupies nearly all the cast of a PLC, Therefore PLC's cost could also be reduced by restructuring the main processor card. In a conventional main processor card, operation rue entrusted to either Micro Processing Unit(MPU)-based processing or Application-Specific Integrated Circuit(ASIC)-based processing, Main processor card needs architectural redesigning, to improve efficiency and to reduce cost simultaneously. The conventional ASIC-based processing is partially replaced by MPU-based processing, and the rest of the processing remains assigned to ASIC, which serves as a control co-processor, The MPU and tbe co-processor share the tasks of control language processing and control operation that used to be done collectively by the conventional ASIC, The new main processor card consisting of an MPU and a co-processor has a Easter processing speed, larger capacity and lower price than the conventional model, because of the functions of co-processor, MPU/co-processor configuration and task sharing between them. This new main processor card enabled us to develop a PLC that is more efficient and economical.
引用
收藏
页码:187 / 190
页数:4
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