A multiple-class buffer allocation scheme for ATM networks with VBR traffic

A multiple-class buffer allocation scheme for ATM networks with VER (Variable Bit Rate) traffic is presented in this paper. The dynamic buffer allocation scheme consists of two parts. The first part is used to estimate the buffer size required for each class of traffic. The second part is used to dynamically rearrange the buffer space among different priorities of traffic classes. For the purpose of evaluation, we develop a mathematical model to analytically estimate the buffer sire required for each stage of switch node. In addition, a simulation model is built. In the simulation study, the analytical results from the mathematical model are verified with the simulation.