DLL-Based Pulse-Width Modulation Digital-to-Analog Converter for Continuous-Time Sigma Delta Modulators

被引：0

作者：

Chen, Zong-Yi ^{[1
]}

Hung, Chung-Chih ^{[1
]}

机构：

[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan

来源：

2014 IEEE 57TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS) | 2014年

关键词：

BANDWIDTH; JITTER;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, the DLL-based pulse-width modulation (PWM) digital-to-analog converter (DAC) is proposed to convert the output of multi-bit quantizer to a single-bit pulse-width modulated signal in the modified continuous-time sigma-delta modulators (CT-SDMs) with improved signal transfer function (STF). The DLL-based PWM DAC is more robust to clock jitter and excess loop delay (ELD) effects than conventional multi-bit DAC and other PWM DAC with similar speed and power requirements of the integrators in CT-SDMs. Furthermore, the proposed PWM DAC is based on inherently linear single-bit DAC, so the dynamic-element matching (DEM) techniques, which increase the circuit complexity and power consumption to compensate the mismatch of unit elements in the multi-bit DAC, can be removed in CT-SDMs.

引用

页码：757 / 760

页数：4

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