An 8-bit 2-GSample/s analog-to-digital converter in 0.5-μm SiGe technology

被引:0
|
作者
Vessal, F [1 ]
Salama, CAT [1 ]
机构
[1] Univ Toronto, Edward S Rogers Sr Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada
关键词
analog-to-digital converter; folding-interpolating; HBT;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper deals with the design and implementation of an 8-bit, 2-GSample/s folding-interpolating analog-to-digital converter using a 0.5-mum SiGe technology with a unity gain cut off frequency f(tau) of 47 GHz. The high-speed, high-resolution A/D converter has applications in direct IF sampling receivers for wideband communication systems. The converter occupies an area of 3.5mm. x 3.5mm including pads and exhibits a better than 7-bit ENOB for an input signal frequency up to 500 MHz and a sampling rate of 2 GSample/s. The maximum value of DNL and INL are 0.6 and 1 Lsb respectively. The power dissipation of the ADC is 3.5 W using a 3.3 V power supply.
引用
收藏
页码:893 / 896
页数:4
相关论文
共 50 条
  • [1] An 8-bit 2-gsample/s folding-interpolating analog-to-digital converter in SiGe technology
    Vessal, F
    Salama, CAT
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (01) : 238 - 241
  • [2] THE DESIGN OF AN 8-BIT FOLDING ANALOG-TO-DIGITAL CONVERTER
    VANDEPLASSCHE, R
    BALTUS, P
    PHILIPS JOURNAL OF RESEARCH, 1987, 42 (5-6) : 482 - 509
  • [3] An efficient architecture of 8-bit CMOS analog-to-digital converter
    Tan, PBY
    Suparjo, BS
    Wagiran, R
    Sidek, R
    2000 IEEE INTERNATIONAL CONFERENCE ON SEMICONDUCTOR ELECTRONICS, PROCEEDINGS, 2000, : 178 - 186
  • [4] DESIGN OF AN 8-BIT FOLDING ANALOG-TO-DIGITAL CONVERTER.
    van de Plassche, R.
    Baltus, P.
    Philips Journal of Research, 1987, 42 (5-6): : 482 - 510
  • [5] An 8-bit flash analog-to-digital converter with an array of redundant comparators
    Budanov, D. O.
    Morozov, D. V.
    Pilipko, M. M.
    JOURNAL OF COMMUNICATIONS TECHNOLOGY AND ELECTRONICS, 2017, 62 (04) : 421 - 431
  • [6] An 8-bit flash analog-to-digital converter with an array of redundant comparators
    D. O. Budanov
    D. V. Morozov
    M. M. Pilipko
    Journal of Communications Technology and Electronics, 2017, 62 : 421 - 431
  • [7] A RADIATION-HARDENED CMOS 8-BIT ANALOG-TO-DIGITAL CONVERTER
    BROELL, FG
    BARNARD, WJ
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1983, 30 (06) : 4246 - 4250
  • [8] An 8-Bit High Speed Successive Approximation Analog-to-Digital Converter
    Wang Pengyu
    Gao Bo
    Qian Zheng
    Gang Min
    Tan Ping
    CONFERENCE PROCEEDINGS OF 2018 IEEE ASIA PACIFIC CONFERENCE ON POSTGRADUATE RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIMEASIA 2018), 2018, : 5 - 8
  • [9] An 8-bit 200 MS/s CMOS folding/interpolating analog-to-digital converter
    Heo, SC
    Jang, YC
    Park, SH
    Park, HJ
    IEICE TRANSACTIONS ON ELECTRONICS, 2003, E86C (04): : 676 - 681
  • [10] An 8-bit 1.72-Gsample/s two channel Time-Interleaved Analog-to-Digital Converter based on PCB Circuit board
    Wu, Jin
    Wu, Danyu
    Jiang, Fan
    Yu, Yang
    Zhou, Lei
    Liu, Xinyu
    Wu, Dexin
    INDUSTRIAL INSTRUMENTATION AND CONTROL SYSTEMS II, PTS 1-3, 2013, 336-338 : 1525 - +