A High Performance Solid-state Storage System for High Speed Data Acquisition Applications

被引：0
|
作者：
Yu, Xujin [1 ]
Wang, Xuguang [1 ]
Yan, Wei [1 ]
机构：
[1] Chinese Acad Sci, Solid State Storage Joint Lab, Suzhou Inst Nanotech & Nanobion, Suzhou 215123, Peoples R China
来源：
2014 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2014年
关键词：
data acquisition; NAND flash; FPGA; flash controller; bit error rate;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A FPGA based storage system with NAND flash array for high speed data acquisition applications is designed and implemented. A sharing bus architecture of flash arrays and a high performance flash controller that supports the new Open NAND Flash Interface Specification (ONFI) 3.0 standard are demonstrated. The total capacity of the storage system is 1 TB and the 16 channels of flash array can achieve a high bandwidth up to 1100 MB/s. The bit error rate of the system is analyzed.
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页数：2
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