Modeling of InAs/Si Electron-Hole Bilayer Tunnel Field Effect Transistor

被引:0
|
作者
Wisniewski, Piotr [1 ,2 ]
Majkusiak, Bogdan [3 ]
机构
[1] Warsaw Univ Technol, Ctr Adv Mat & Technol CEZAMAT, Poleczki 19, PL-02822 Warsaw, Poland
[2] Polish Acad Sci, Ctr Terahertz Res & Applicat CENTERA, Inst High Pressure Phys, Warsaw, Poland
[3] Warsaw Univ Technol, Inst Microelect & Optoelect, Fac Elect & Informat Technol, Koszykowa 75, PL-00662 Warsaw, Poland
来源
PRZEGLAD ELEKTROTECHNICZNY | 2022年 / 98卷 / 02期
关键词
numerical modeling; tunneling; TFET; semiconductor devices;
D O I
10.15199/48.2022.02.30
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this work, we present the results of modeling of InAs/Si Electron-Hole Bilayer Tunnel Field Effect Transistor. For this purpose, we used a developed numerical device simulator based on a self-consistent solution of Poisson and Schrodinger equations. We present the analysis of the impact of the channel layer thickness on the current-voltage characteristics. We show that using heterostructure in the device channel can give additional freedom in constructing the EHB TFET.
引用
收藏
页码:133 / 135
页数:3
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