A 58-63.6GHz Quadrature PLL Frequency Synthesizer Using Dual-Injection Technique

被引：0

作者：

Musa, Ahmed ^{[1
]}

Murakami, Rui ^{[1
]}

Sato, Takahiro ^{[1
]}

Chaivipas, Win ^{[1
]}

Okada, Kenichi ^{[1
]}

Matsuzawa, Akira ^{[1
]}

机构：

[1] Tokyo Inst Technol, Dept Phys Elect, Meguro Ku, Tokyo 1528552, Japan

来源：

2011 16TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC) | 2011年

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper proposes a 60GHz quadrature PLL frequency synthesizer that has a tuning range capable of covering the whole band specified by the IEEE802.15.3c with exceptional phase noise. The synthesizer is constructed using a 20GHz PLL that is coupled with a frequency tripler to generate the 60GHz signal. Both the 20GHz PLL and the ILO were fabricated using a 65nm CMOS process and measurement results show a phase noise of -96dBc/Hz at 60GHz while consuming 77.5mW from a 1.2V supply.

引用

页数：2

共 48 条

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