Computational acceleration methodologies: Advantages of reconfigurable acceleration subsystems

被引：2
|
作者：
Savaria, Y [1 ]
Bois, G [1 ]
Popovic, P [1 ]
Wayne, A [1 ]
机构：
[1] ECOLE POLYTECH,DEPT GENIE ELECT & GENIE INFORMAT,MONTREAL,PQ H3C 3A7,CANADA
来源：
HIGH-SPEED COMPUTING, DIGITAL SIGNAL PROCESSING, AND FILTERING USING RECONFIGURABLE LOGIC | 1996年 / 2914卷
关键词：
digital signal processing (DSP); field-programmable gate arrays (FPGA); reconfigurable computing; reconfigurable acceleration subsystem (RAS); computational acceleration; X-CIM;
D O I：
10.1117/12.255817
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：195 / 205
页数：11
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