Innovative application of a passive device failure analysis technique to a JFET

被引：0
|
作者：
Erickson, JJ [1 ]
Ditz, MJ [1 ]
机构：
[1] Hughes Space & Commun Co, El Segundo, CA USA
来源：
ISTFA '98: PROCEEDINGS OF THE 24TH INTERNATIONAL SYMPOSIUM FOR TESTING AND FAILURE ANALYSIS | 1998年
关键词：
D O I：
暂无
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
A technique normally used for the analysis of tantalum capacitor failures was successfully applied to a JFET. The JFET had a short from the source to the gate. The short was located at the source bond pad and had resulted from a combination of the use of too large a bond wire and excessive bonding pressure. The exact location of the site of the short was successfully determined by using a copper electroplating technique typically used for locating shorts or leakage sites on the tantalum slug of a tantalum capacitor.
引用
收藏
页码：359 / 362
页数：4
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