Programmable analog-to-digital converter for low-power DC-DC SMPS

被引:39
|
作者
Parayandeh, Arnir [1 ]
Prodic, Aleksandar [2 ]
机构
[1] Univ Toronto, Dept Elect & Comp Engn, Lab Low Power Management & Integrated SMPS, Toronto, ON M5S 1A7, Canada
[2] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5S 1A7, Canada
关键词
DC-DC SMPS; digital control; integrated circuit (IC); low-power;
D O I
10.1109/TPEL.2007.913932
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An application-specific delay-line based windowed analog-to-digital converter (ADC) with programmable reference voltage, conversion time, and accuracy of voltage regulation, is introduced. The ADC can be fully implemented on a small silicon area and is suitable for implementation in various integrated digital controllers for high-frequency low-power switch-mode power supplies. The programmable characteristics are achieved through the utilization of the inherent averaging effect of the delay line and through the adjustments of delay cells' propagation times. The ADC is implemented in a standard 0.18 mu m CMOS technology, as a part of a high-frequency digital controller integrated circuit, and tested with a 1.5 MHz, 1 W buck dc-dc converter.
引用
收藏
页码:500 / 505
页数:6
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