High-Throughput Sharp Interpolation Filter Hardware Architecture for the AV1 Video Codec

被引:0
|
作者
Freitas, Daiane [1 ]
Diniz, Claudio M. [2 ]
Grellert, Mateus [3 ]
Correa, Guilherme [1 ]
机构
[1] Fed Univ Pelotas UFPel, Video Technol Res Grp ViTech, Pelotas, RS, Brazil
[2] Fed Univ Rio Grande Sul UFRGS, Inst Informat INF, Porto Alegre, RS, Brazil
[3] Fed Univ Santa Catarina UFSC, Embedded Comp Lab ECL, Florianopolis, SC, Brazil
关键词
Video coding; AV1; hardware; interpolation filter; architecture;
D O I
10.1109/SBCCI53441.2021.9529993
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Motion Estimation (ME) is one of the most important steps of modern video encoders, due to its task of reducing temporal redundancies, but it is also highly computing intensive. The fractional part of ME is particularly complex, since it involves interpolating fractional pixels before the search. The fractional ME of AV1 encoders is even more challenging, since it supports up to 90 different interpolation filters grouped in 4 families. In this work, a dedicated interpolation hardware is proposed to mitigate this issue. The designed architecture interpolates the sharp interpolation filter family of AV1. A complexity analysis evaluates the throughput required in this process, showing that the designed architecture can process a 3840X2160 video sequences in real-time considering the motion compensation step, requiring 63.14 mW of power to operate.
引用
收藏
页数:6
相关论文
共 50 条
  • [1] Hardware Architecture for the Regular Interpolation Filter of the AV1 Video Coding Standard
    Freitas, Daiane
    da Silva, Rafael
    Siqueira, Icaro
    Diniz, Claudio M.
    Reis, Ricardo A. L.
    Grellert, Mateus
    [J]. 28TH EUROPEAN SIGNAL PROCESSING CONFERENCE (EUSIPCO 2020), 2021, : 560 - 564
  • [2] High-Throughput Multifilter Interpolation Architecture for AV1 Motion Compensation
    Domanski, Robson
    Goebel, Jones
    Penny, Wagner
    Porto, Marcelo
    Palomino, Daniel
    Zatt, Bruno
    Agostini, Luciano
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2019, 66 (05) : 883 - 887
  • [3] High-Throughput and Multiplierless Hardware Design for the AV1 Local Warped MC Interpolation
    Domanski, Robson
    Kolodziejski, William
    Penny, Wagner
    Porto, Marcelo
    Zatt, Bruno
    Agostini, Luciano
    [J]. 2023 IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING, ICIP, 2023, : 2680 - 2684
  • [4] Low-Power and High-Throughput Approximated Architecture for AV1 FME Interpolation
    Domanski, Robson
    Kolodziejski, William
    Correa, Guilherme
    Porto, Marcelo
    Zatt, Bruno
    Agostini, Luciano
    [J]. 2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2021,
  • [5] A High-Throughput Hardware Architecture for AV1 Non-Directional Intra Modes
    Correa, Marcel Moscarelli
    Waskow, Bianca Hermann
    Goebel, Jones William
    Palomino, Daniel Munari
    Correa, Guilherme Ribeiro
    Agostini, Luciano Volcan
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2020, 67 (05) : 1481 - 1494
  • [6] A High-Throughput Hardware Design for the AV1 Decoder Intraprediction
    Goebel, Jones William
    Agostini, Luciano Volcan
    Zatt, Bruno
    Porto, Marcelo Schiavon
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023, 31 (04) : 498 - 511
  • [7] A High Throughput Hardware Architecture Targeting the AV1 Paeth Intra Predictor
    Correa, Marcel
    Waskow, Bianca
    Goebel, Jones
    Palomino, Daniel
    Correa, Guilherme
    Agostini, Luciano
    [J]. 2019 IEEE 10TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS & SYSTEMS (LASCAS), 2019, : 93 - 96
  • [8] High-Throughput and Multiplierless Hardware Design for the AV1 Fractional Motion Estimation
    Domanski, Robson
    Kolodziejski, William
    Penny, Wagner
    Porto, Marcelo
    Zatt, Bruno
    Agostini, Luciano
    [J]. 2023 IEEE 14TH LATIN AMERICA SYMPOSIUM ON CIRCUITS AND SYSTEMS, LASCAS, 2023, : 72 - 75
  • [9] Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder
    Gomes, Jiovana Sousa
    Bampi, Sergio
    Bitencourt, Tulio Pereira
    Livi Ramos, Fabio Luis
    [J]. IEEE DESIGN & TEST, 2022, 39 (06) : 119 - 127
  • [10] Film Grain Synthesis for AV1 Video Codec
    Norkin, Andrey
    Birkbeck, Neil
    [J]. 2018 DATA COMPRESSION CONFERENCE (DCC 2018), 2018, : 3 - 12