A new 2-way multi-level partitioning algorithm

被引：4

作者：

Saab, Y ^{[1
]}

机构：

[1] Univ Missouri, Dept Comp Sci & Comp Engn, Columbia, MO 65211 USA

来源：

VLSI DESIGN | 2000年 / 11卷 / 03期

关键词：

hypergraph partitioning; multi-level; clustering; contraction;

D O I：

10.1155/2000/65821

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Partitioning is a fundamental problem in the design of VLSI circuits. In recent years, the multi-level partitioning approach has been used with success by a number of researchers. This paper describes a new multi-level partitioning algorithm (PART) that combines a blend of iterative improvement and clustering, biasing of node gains, and local uphill climbs. PART is competitive with recent state-of-the-art partitioning algorithms. PART was able to find new lower cuts for many benchmark circuits. Under suitably mild assumptions, PART also runs in linear time.

引用

页码：301 / 310

页数：10

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