Precise Clock Parameter Estimation and Ground Truth Capture for Clock Error Measurements using FPGAs

被引:0
|
作者
Dwivedi, Satyam [1 ]
Handel, Peter [1 ]
机构
[1] KTH Royal Inst Technol, Dept Signal Proc, Stockholm, Sweden
关键词
SYNCHRONIZATION; NETWORKS;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this extended abstract we discuss and propose a mechanism to estimate clock parameters between two clocks using TDC. Simultaneously, we have proposed a ground truth capture methodology for clock error measurements. In particular, we have proposed an accurate way of measuring clock phase ground truth at any instant in time using delay lines in FPGA. Accuracy of clock phase ground truth measurement can be up to 16 ps. We have estimated clock parameters from measurements and have compared it with clock ground truth obtained using suggested methods. Relative frequency errors are estimated with RMSE of 0.46 Hz and phase error is estimated with RMSE of 0.29 ns.
引用
收藏
页码:83 / 86
页数:4
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