Board Level Solder Joint Assembly and Reliability for Ultra Thin BGA Packages

被引：0

作者：

Hossain, Mohammad M. ^{[1
]}

Aravamudhan, Srinivasa R. ^{[1
]}

Nowakowski, Marilyn ^{[1
]}

Ma, Xiaoqing ^{[1
]}

Walwadkar, Satyajit S. ^{[1
]}

Kulkarni, Vijay ^{[1
]}

Muthukumar, Sriram ^{[1
]}

机构：

[1] Intel Corp, Chandler, AZ 85226 USA

来源：

2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC) | 2012年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Miniaturization of electronic components driven by "thin and light" products in portable and consumer electronics has lead to thinner and smaller Ball Grid Array (BGA) packages. Surface Mount (SMT) processes for these smaller and thinner packages present significant challenges, and the reduced Z-height requirements were met with improved process solutions. This study is focused on two technology options: (a) Solder Grid Array (SGA) and (b) Coreless packaging. Dynamic warpage and thermo mechanical analysis have significant impact on board level reliability from these technology options. Board level reliability tests indicates the SGA cored packages show lower temperature cycle performance compared to BGA cored packages due to the reduced solder joint height under fatigue loading. Shock tests are comparable for both BGA and SGA cored packages. Coreless BGA packages show significantly better reliability performance compared to the equivalent conventional cored BGA packages.

引用

页码：43 / 48

页数：6

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