High performance multi-finger MOSFET on SOI for RF amplifiers

In this paper, we propose structural modifications in the conventional planar metal-oxide-semiconductor field-effect transistor (MOSFET) on silicon-on-insulator by utilizing trenches in the epitaxial layer. The proposed multi-finger MOSFET (MF-MOSFET) has dual vertical-gates placed in separate trenches to form multiple channels in the p-base which carry the drain current in parallel. The proposed device uses TaN as gate electrode and SiO2 as gate dielectric. Simultaneous conduction of multiple channels enhances the drain current (I-D) and provides higher transconductance (g(m)) leading to significant improvement in cut-off frequency (f(t)). Two-dimensional simulations are performed to evaluate and compare the performance of the MF-MOSFET with the conventional MOSFET. At a gate length of 60 nm, the proposed device provides 4 times higher I-D, 3 times improvement in g(m) and 1.25 times increase in f(t) with better control over the short channel effects as compared with the conventional device.