Sparse-coefficient polynomial approximations for hardware implementations

被引:0
|
作者
Brisebarre, N [1 ]
Muller, JM [1 ]
Tisserand, A [1 ]
机构
[1] Univ Lyon 1, LIP, Arenaire Project,CNRS,ENS Lyon, INRIA,ENS Lyon, F-69364 Lyon, France
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a method for automatic generation of best polynomial approximations dedicated to hardware implementation. The generated polynomial approximations lead to high-speed and small hardware operators because of the use of sparse coefficients (i.e. we include fixed strings of zeros in the binary representation of the coefficients). Two different solutions have been investigated for the generation of the sparse-coefficient polynomial approximations. Our first results show up to 47% smaller coefficients compared to standard minimax approximations for comparable accuracy.
引用
收藏
页码:532 / 535
页数:4
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