Performance optimization of 3D multigrid on hierarchical memory architectures

被引:0
|
作者
Kowarschik, M [1 ]
Rüde, U
Thürey, N
Weiss, C
机构
[1] Univ Erlangen Nurnberg, Inst Informat, Lehrstuhl Syst Simulat Informat 10, D-8520 Erlangen, Germany
[2] Tech Univ Munich, Fak Informat, Lehrstuhl Rechnertech & Rechnerorg, D-8000 Munich, Germany
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D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Today's computer architectures employ fast cache memories in order to hide both the low main memory bandwidth and the latency of main memory accesses, which is slow in contrast to the floating-point performance of the CPUs. Efficient program execution can only be achieved, if the codes respect the hierarchical memory design. Iterative methods for linear systems of equations are characterized by successive sweeps over data sets, which are much too large to fit in cache. Standard implementations of these methods thus do not perform efficiently on cache-based machines. In this paper we present techniques to enhance the cache utilization of multigrid methods on regular mesh structures in 3D as well as various performance results. Most of these techniques extend our previous work on 2D problems.
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页码:307 / 316
页数:10
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