Digitally Intensive Wireless Transmitter Architecture Employing RF Pulse Width Modulation

被引：0

作者：

Song, Hyejeong ^{[1
]}

Gharpurey, Ranjit ^{[1
]}

机构：

[1] Univ Texas Austin, Dept Elect & Comp Engn, Austin, TX 78712 USA

来源：

2014 IEEE DALLAS CIRCUITS AND SYSTEMS CONFERENCE (IEEE DCAS 2014) | 2014年

关键词：

pulse-width modulation (PWM); PLL; Cartesian transmitter; wireless; class-D; CMOS power amplifier; switched capacitor power amplifier;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

A digitally-intensive Cartesian RF transmitter based on three-level pulse width modulation (PWM) is proposed. The architecture utilizes two PLL-based RF-PWM generators to modulate baseband I and Q signals to switching signals at RF, which are used to drive class-D output stages. Due to the use of a ring voltage controlled oscillator (VCO), the architecture is wellsuited for multiband operation. A switched capacitor technique is used to provide a differential three-level RF-PWM output. The proposed transmitter is simulated in a 65-nm CMOS process, and achieves a peak output power of 22 dBm with 48% and 33% peak power added efficiency (PAE) at 900 MHz and 1.95 GHz respectively.

引用

页数：4

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