System level design methodology

被引:1
|
作者
van der Putten, PHA [1 ]
Voeten, JPM [1 ]
Geilen, MCW [1 ]
Stevens, MPJ [1 ]
机构
[1] Eindhoven Univ Technol, Sect Informat & Commun Syst, NL-5600 MB Eindhoven, Netherlands
关键词
D O I
10.1109/IWV.1998.667107
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
There are many fundamental problems in the design of object-oriented methods that support the development of formal executable models on a system level, and that are suitable for hardware/software co-specification. System level description formalisms should combine concepts expressive enough to model the essentials of a system on the right level of abstraction. This paper reports experiences in developing a specification and design method SHE (Software/Hardware Engineering) which is based on a formal language POOSL (Parallel Object-Oriented Specification Language). The method offers a path from an informal specification to a unified formal model that enables evaluation of system properties. This paper describes concrete new results as well as an approach rewards research on system level methodology.
引用
收藏
页码:11 / 16
页数:6
相关论文
共 50 条
  • [21] Design For ReConfigurability: an Electronic System Level Methodology to exploit Reconfigurable Platforms
    D'Andrea, Gabriella
    Pomante, Luigi
    2020 30TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS (FPL), 2020, : 355 - 356
  • [22] System level design methodology for system on chips using multi-threaded graphs
    Suhaib, S
    Mathaikutty, D
    Shukla, S
    IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, 2005, : 133 - 136
  • [23] System-level co-design methodology based on platform design flow for system-on-chip
    Wen, Quan
    7TH INTERNATIONAL CONFERENCE ON COMPUTER-AIDED INDUSTRIAL DESIGN & CONCEPTUAL DESIGN, 2006, : 246 - 249
  • [24] Low level dependent design methodology for high level VLSI design
    Bian, Ji-Nian
    Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao/Journal of Computer-Aided Design & Computer Graphics, 2000, 12 (11): : 827 - 829
  • [25] Efficient digital system design methodology with SystemC register transfer level modeling
    Zabawa, MC
    Wunnava, SV
    PROCEEDINGS OF THE IEEE SOUTHEASTCON 2004: ENGINEERING CONNECTS, 2004, : 395 - 399
  • [26] System-level filter design methodology for WLAN-OFDM transceivers
    Debaillie, B
    Come, B
    Eberle, W
    Donnay, S
    MICROWAVE JOURNAL, 2002, 45 (05) : 268 - +
  • [27] Polychrony for formal refinement-checking in a system-level design methodology
    Talpin, JP
    Le Guernic, P
    Shukla, SK
    Gupta, R
    Doucet, F
    THIRD INTERNATIONAL CONFERENCE ON APPLICATION OF CONCURRENCY TO SYSTEM DESIGN, PROCEEDINGS, 2003, : 9 - 19
  • [28] A systematic system level design methodology for dual band CMOS RF receivers
    El-Nozahi, Mohamed
    Entesari, Kamran
    Sanchez-Sinencio, Edgar
    2007 50TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3, 2007, : 824 - 827
  • [29] System Level Design Methodology for Hybrid Multi-Processor SoC on FPGA
    Wu, Jason
    Williams, John
    Bergmann, Neil
    PROCEEDINGS OF THE SIXTEENTH IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, 2008, : 312 - 313
  • [30] QPSK demodulator using the methodology of automated system-level ASIC design
    Kim, DS
    Park, HD
    Kang, CH
    ELEVENTH ANNUAL IEEE INTERNATIONAL ASIC CONFERENCE - PROCEEDINGS, 1998, : 307 - 311