Intellectual Property Protection (IPP) using Obfuscation in C, VHDL, and Verilog Coding

被引:2
|
作者
Meyer-Baese, Uwe [1 ]
Castillo, Encarni [2 ]
Botella, Guillermo [1 ]
Parrilla, L. [2 ]
Garcia, Antonio [2 ]
机构
[1] Florida State Univ, Dept E&C Eng, Tallahassee, FL 32310 USA
[2] Univ Granada, Dpto Elect Technol Computadores, E-18071 Granada, Spain
关键词
FPGA; IPP; Obfuscation; VHDL; Verilog; ANSI-C;
D O I
10.1117/12.884142
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
One of the big challenges in the design of embedded systems today is how to combine design reuse and intellectual property protection (IPP). Strong IP schemes such as hardware dongle or layout watermarking usually have a very limited design reuse for different FPGA/ASIC design platforms. Some techniques also do not fit well with protection of software in embedded microprocessors. Another approach to IPP that allows an easy design reuse and has low costs but a somehow reduced security is code "obfuscation." Obfuscation is a method to hide the design concept, or program algorithm included in the C or HDL source by using one or more transformations of the original code. Obfuscation methods include, for instance, renaming identifiers, removing comments or formatting of the code. More sophisticated obfuscation methods include data splitting or merging, and control flow changes. This paper shows strength and weakness of method obfuscating C, VHDL and Verilog code.
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页数:12
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