A Digital Background Correction Technique Combined with DWA for DAC Mismatch Errors in Multibit ΣA ADCs

被引：0

作者：

Pakniat, Hossein ^{[1
]}

Yavari, Mohammad ^{[1
]}

Lotfi, Reza ^{[2
]}

机构：

[1] Amirkabir Univ Technol, Dept Elect Engn, Integrated Circuits Design Lab, Tehran, Iran

[2] Ferdowsi Univ Mashad, Dept Elect Engn, Mashhad, Iran

来源：

2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS | 2010年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A digital background correction technique combined with data weighted averaging (DWA) algorithm is presented to overcome the digital-to-analog converters (DACs) unit element mismatch errors in multibit sigma-delta modulators (Sigma Delta Ms). This technique needs a background measurement process. The circuit-level simulation results confirm the validity of the measurement process and the system-level simulation results are provided to verify the usefulness of this correction technique in low oversampling ratios (OSRs). This method enhances the peak signal-to-noise and distortion ratio (SNDR) about 11.5 dB with respect to the DWA algorithm when the OSR is 8.

引用

页码：293 / 296

页数：4

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