Design for reliability (DFR) methodology for electronic packaging assemblies

被引:0
|
作者
Pang, JHL [1 ]
Low, TH [1 ]
Xiong, BS [1 ]
Che, F [1 ]
机构
[1] Nanyang Technol Univ, Sch Mech & Prod Engn, Singapore 639798, Singapore
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Design for reliability requires knowledge based in materials testing and modeling, finite element modeling and simulation, failure mechanism and life prediction and reliability tests for validation. A comprehensive mechanics characterization of electronic solders such as Sn/Pb and Pb-free solders has been established. Examples of conventional 2D and 3D Finite Element Analysis is provided for Thermal Cycling analysis of elastic-plastic-creep analysis of solder joints. The combined effect of modeling viscoelastic underfill and viscoplastic solder is reported for thermal cycling (TC) and thermal shock loading(TS). Two global-local modeling techniques for board-level analysis was calibated. The global-local 3D modeling techniques are global-local submodeling (GLS) and global-local-beam (GLB) methods.
引用
收藏
页码:470 / 478
页数:9
相关论文
共 50 条
  • [21] Reliability in Electronic Packaging: Past, Now and Future
    Chen Z.
    Mei Y.
    Liu S.
    Li H.
    Liu L.
    Lei X.
    Zhou Y.
    Gao X.
    [J]. Jixie Gongcheng Xuebao/Journal of Mechanical Engineering, 2021, 57 (16): : 248 - 268
  • [22] Role of adhesion and its reliability implications in electronic assemblies
    Viswanadham, P
    [J]. 4TH INTERNATIONAL CONFERENCE ON ADHESIVE JOINING AND COATING TECHNOLOGY IN ELECTRONICS MANUFACTURING - PROCEEDINGS, 2000, : 28 - 34
  • [23] Design and Reliability in Wafer Level Packaging
    Fan, Xuejun
    Han, Qiang
    [J]. EPTC: 2008 10TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, VOLS 1-3, 2008, : 834 - 841
  • [24] Solder joints layout design and reliability enhancements of wafer level packaging using response surface methodology
    Lee, Chang-Chun
    Lee, Chien-Chen
    Ku, Hsiao-Tung
    Chang, Shu-Ming
    Chiang, Kuo-Ning
    [J]. MICROELECTRONICS RELIABILITY, 2007, 47 (2-3) : 196 - 204
  • [25] A review on reliability of electronic packaging in micro/nano manufacturing
    Yang, Ping
    Wang, Yang
    Deng, Lin
    [J]. International Journal of Materials and Structural Integrity, 2015, 9 (1-3) : 131 - 143
  • [26] Experimental study for reliability of electronic packaging under vibration
    Ham, SJ
    Lee, SB
    [J]. EXPERIMENTAL MECHANICS, 1996, 36 (04) : 339 - 344
  • [27] Application of Computational Mechanics to Reliability Studies of Electronic Packaging
    Miyazaki, N.
    Ikeda, T.
    [J]. COMPUTATIONAL METHODS IN ENGINEERING & SCIENCE, 2006, : 88 - 100
  • [28] INVESTIGATING THE INTEGRITY AND RELIABILITY OF ELECTRONIC PACKAGING AND INTERCONNECTION MATERIALS
    SANDOR, B
    KILINSKI, T
    [J]. JOM-JOURNAL OF THE MINERALS METALS & MATERIALS SOCIETY, 1990, 42 (09): : 55 - 55
  • [29] Packaging in the IT environment - Competing challenges in the design of packaging for electronic products
    Horbal, J
    Schaffer, M
    [J]. 2005 IEEE INTERNATIONAL SYMPOSIUM ON ELECTRONICS & THE ENVIRONMENT, CONFERENCE RECORD, 2005, : 93 - 95
  • [30] Influences of packaging materials on the solder joint reliability of chip scale package assemblies
    Wilde, J
    Cheng, ZN
    Wang, GZ
    [J]. INTERNATIONAL SYMPOSIUM ON ADVANCED PACKAGING MATERIALS: PROCESSES, PROPERTIES AND INTERFACES, PROCEEDINGS, 1999, : 144 - 149