Reliability Aging and Modeling of Chip-Package Interaction on Logic Technologies Featuring High-k Metal Gate Planar and FinFET Transistors

被引：0

作者：

Lee, Jen-Hao ^{[1
]}

Chen, Eliot S. H. ^{[1
]}

Lee, Yung-Huei ^{[1
]}

Lin, Chun-Hung ^{[1
]}

Wu, Chun-Yu ^{[1
]}

Hsieh, Ming-Han ^{[1
]}

Huang, Kevin ^{[1
]}

Wang, Jhong-Sheng ^{[1
]}

Tsai, Yung-Sheng ^{[1
]}

Lu, Ryan ^{[1
]}

Shih, Jiaw-Ren ^{[1
]}

机构：

[1] Taiwan Semicond Mfg Co, 121,Pk Ave 3,Hsinchu Sci Pk, Hsinchu 30077, Taiwan

来源：

2015 IEEE INTERNATIONAL INTEGRATED RELIABILITY WORKSHOP (IIRW) | 2015年

关键词：

CPI; HK/MG; FinFET; FEM; BTI; HCI; mobility;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Despite chip-package interaction (CPI) has been extensively used in nano-electronics industry, impact of CPI stress on transistor performance and reliability remains unclear. In this work, performance change of transistor featuring HK/MG planar and FinFET by 4-point bending experiments were conducted to study stress evolution. Finite-element modeling (FEM) simulation revealed that P-FinFET mobility change is less sensitive to applied stress than planar. Device reliability as BTI/HCI and ring oscillator frequency drift of both planar and FinFET are all immune to strain. Moreover, FinFET mobility degradation caused by NBTI is independent of strain type, due to its fully-depleted regime. Management of carrier mobility shifts and transistor aging by optimized chip package technology are also presented in this study.

引用

页码：63 / 67

页数：5

共 30 条

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