Adversarial Defect Detection in Semiconductor Manufacturing Process

被引:22
|
作者
Kim, Jaehoon [1 ]
Nam, Yunhyoung [1 ]
Kang, Min-Cheol [2 ]
Kim, Kihyun [2 ]
Hong, Jisuk [2 ]
Lee, Sooryong [2 ]
Kim, Do-Nyun [3 ,4 ]
机构
[1] Seoul Natl Univ, Dept Mech Engn, Seoul 08826, South Korea
[2] Samsung Elect, Proc Dev Team, Hwasung 445701, South Korea
[3] Seoul Natl Univ, Dept Mech Engn, Inst Adv Machines & Design, Seoul 08826, South Korea
[4] Seoul Natl Univ, Inst Engn Res, Seoul 08826, South Korea
关键词
Layout; Inspection; Object detection; Scanning electron microscopy; Heating systems; Semiconductor process modeling; Semiconductor device modeling; Lithography pattern; defect detection; semiconductor manufacturing; deep learning; adversarial network;
D O I
10.1109/TSM.2021.3089869
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Detecting defects in the inspection stage of semiconductor manufacturing process is a crucial task to improve yield and productivity as well as wafer quality. Recent Advances in semiconductor process technology have greatly increased the transistor density. As a result, an increasingly high number of defects inevitably emerge and we need a more accurate and efficient detection method to manage them. In this paper, we propose a deep-learning-based defect detection model to expedite the process. It adopts an adversarial network architecture of conditional GAN. The discriminator of an adversarial network architecture helps the detection model learn to detect and classify defects accurately. The high performance is achieved by using Focal Loss, PixelGAN and multi-scale level features, which is shown to be better than the baseline model, CenterNet, when tested for a real industrial dataset.
引用
收藏
页码:365 / 371
页数:7
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