The concept of pseudo evolvable hardware

被引：0

作者：

Sekanina, L ^{[1
]}

Drábek, V ^{[1
]}

机构：

[1] Brno Univ Technol, Fac Elect Engn & Comp Sci, Dept Comp Sci & Engn, Brno 61266, Czech Republic

来源：

PROGRAMMABLE DEVICES AND SYSTEMS | 2000年

关键词：

configuration; genetic algorithms; digital circuits; self-optimizing systems; system concepts;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Evolvable hardware is a new technology, where circuit connection is subject to evolution. The model of the evolvable circuit is used in the task of image compression. This work is done with evolvable hardware at functional level. Possible hardware implementations are discussed and a new concept of constrained evolution - pseudo evolvable hardware - is open. This paper describes the implementation principle of a virtual evolvable machine on top of a normal FPGA. In this way, the current FPGAs can implement evolvable circuit. Copyright (C) 2000 IFAC.

引用

页码：117 / 122

页数：6

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