OpenIPMC: A Free and Open-Source Intelligent Platform Management Controller Software

被引：6
|
作者：
Calligaris, Luigi [1 ]
Cascadan, Andre [1 ]
Ardila-Perez, Luis E. [2 ]
Casu, Bruno [1 ]
da Costa, Alison Franca [3 ]
Shinoda, Ailton Akira [3 ]
Ramalho, Lucas Arruda [4 ]
Sander, Oliver [2 ]
机构：
[1] Sao Paulo State Univ UNESP, Sci Comp Ctr NCC, BR-01140070 Sao Paulo, Brazil
[2] Karlsruhe Inst Technol, Inst Data Proc & Elect IPE, Campus North, D-76344 Eggenstein Leopoldshafen, Germany
[3] Sao Paulo State Univ UNESP, Elect Engn Dept FEIS, BR-15385000 Ilha Solteira, Brazil
[4] Mato Grosso State Univ UNEMAT, Fac Exact & Technol Sci FACET, BR-78390000 Barra Do Bugres, Brazil
来源：
IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2021年 / 68卷 / 08期
基金：
巴西圣保罗研究基金会;
关键词：
Hardware; Standards; Microcontrollers; Backplanes; Task analysis; Real-time systems; Protocols; Advanced telecommunications computing architecture (ATCA); electronic board management; intelligent platform management controller (IPMC); PCI Industrial Computer Manufacturing Group (PICMG);
D O I：
10.1109/TNS.2021.3092689
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
OpenIPMC is a free and open-source software designed to implement the logic of an intelligent platform management controller (IPMC). An IPMC is a fundamental component of electronic boards conformant to the advanced telecommunications computing architecture (ATCA) standard, currently being adopted by a number of high-energy physics experiments. The IPMC is responsible for monitoring the health parameters of the board, managing its power states, and providing board control, debug, and recovery functions to remote clients. OpenIPMC is based on the FreeRTOS real-time operating system and is designed to be architecture-independent, allowing it to be used in firmware designed for a variety of microcontrollers. Having a fully free and open-source code is an innovative aspect for this kind of software, enabling full customization by the user. In this work, we present the features and structure of OpenIPMC, as well as its example implementations on Xilinx Zynq UltraScale+ (ZynqUS+), Espressif ESP32, and ST Microelectronics STM32 architectures.
引用
收藏
页码：2105 / 2112
页数：8
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