Interface issues in hardware-in-the-loop simulation

被引：0
|
作者：
Monti, A [1 ]
Figueroa, H [1 ]
Lentijo, S [1 ]
Wu, X [1 ]
Dougal, R [1 ]
机构：
[1] Univ S Carolina, Dept Elect Engn, Columbia, SC 29208 USA
来源：
2005 IEEE ELECTRIC SHIP TECHNOLOGIES SYMPOSIUM | 2005年
关键词：
hardware-in-the-loop; interface; simulation;
D O I：
暂无
中图分类号：
U6 [水路运输]; P75 [海洋工程];
学科分类号：
0814 ; 081505 ; 0824 ; 082401 ;
摘要：
This paper discusses the interface issues in hardware-in-the-loop (HIL) simulations. Different interfacing schemes are introduced to extend the applicability of HIL to power electronics applications that contains switching events and power hardware testing. Application examples are used to demonstrate the effectiveness of these interfaces, and HIL simulation results are presented.
引用
收藏
页码：39 / 45
页数：7
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