One-transistor static random-access memory cell array comprising single-gated feedback field-effect transistors

被引:5
|
作者
Choi, Sangik [1 ]
Son, Jaemin [2 ]
Cho, Kyoungah [2 ]
Kim, Sangsig [1 ,2 ]
机构
[1] Korea Univ, Dept Semicond Syst Engn, 145 Anam Ro, Seoul 02841, South Korea
[2] Korea Univ, Dept Elect Engn, 145 Anam Ro, Seoul 02841, South Korea
基金
新加坡国家研究基金会;
关键词
LOW-POWER; SRAM CELL; LOW-VOLTAGE;
D O I
10.1038/s41598-021-97479-x
中图分类号
O [数理科学和化学]; P [天文学、地球科学]; Q [生物科学]; N [自然科学总论];
学科分类号
07 ; 0710 ; 09 ;
摘要
In this study, we fabricated a 2 x 2 one-transistor static random-access memory (1T-SRAM) cell array comprising single-gated feedback field-effect transistors and examined their operation and memory characteristics. The individual 1T-SRAM cell had a retention time of over 900 s, nondestructive reading characteristics of 10,000 s, and an endurance of 10(8) cycles. The standby power of the individual 1T-SRAM cell was estimated to be 0.7 pW for holding the "0" state and 6 nW for holding the "1" state. For a selected cell in the 2 x 2 1T-SRAM cell array, nondestructive reading of the memory was conducted without any disturbance in the half-selected cells. This immunity to disturbances validated the reliability of the 1T-SRAM cell array.
引用
收藏
页数:9
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