A Heterogeneous Computing System with Memristor-Based Neuromorphic Accelerators

被引:0
|
作者
Liu, Xiaoxiao [1 ]
Mao, Mengjie [1 ]
Li, Hai [1 ]
Chen, Yiran [1 ]
Jiang, Hao [2 ]
Yang, J. Joshua [3 ]
Wu, Qing [4 ]
Barnell, Mark [4 ]
机构
[1] Univ Pittsburgh, Elect & Comp Engn, Pittsburgh, PA 15260 USA
[2] San Francisco State Univ, Sch Engn, San Francisco, CA 94132 USA
[3] Hewlett Packard Labs, Palo Alto, CA USA
[4] Air Force Res Lab, Informat Directorate, Rome, NY USA
来源
2014 IEEE HIGH PERFORMANCE EXTREME COMPUTING CONFERENCE (HPEC) | 2014年
关键词
neuromorphic computing; memristor; crossbar array; analog circuit; network-on-chip;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
As technology scales, on-chip heterogeneous architecture emerges as a promising solution to combat the power wall of microprocessors. In this work, we propose a heterogeneous computing system with memristor-based neuromorphic computing accelerators (NCAs). In the proposed system, NCA is designed to speed up the artificial neural network (ANN) executions in many high-performance applications by leveraging the extremely efficient mixed-signal computation capability of nanoscale memristor-based crossbar (MBC) arrays. The hierarchical MBC arrays of the NCA can be flexibly configured to different ANN topologies through the help of an analog Networkon- Chip (A-NoC). A general approach which translates the target codes within a program to the corresponding NCA instructions is also developed to facilitate the utilization of the NCA. Our simulation results show that compared to the baseline general purpose processor, the proposed system can achieve on average 18.2X performance speedup and 20.1X energy reduction over nine representative applications. The computation accuracy degradation is constrained within an acceptable range (e.g., 11%), by considering the limited data precision, realistic device variations and analog signal fluctuations.
引用
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页数:6
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