A design methodology for asynchronous sigma-delta converters

被引:2
|
作者
Kayaalti, Balkir [1 ]
Cerid, Orner [1 ]
Dundar, Gunhan [1 ]
机构
[1] Bogazici Univ, Dept Elect & Elect Engn, TR-34342 Istanbul, Turkey
关键词
D O I
10.1109/RME.2008.4595772
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper a design methodology to design asynchronous continuous time delta-sigma modulators (ASDM) is given. Performance equations relating circuit parameters and the input signal are derived. Asynchronous modulators eliminate the use of an external clock, and thereby jitter and give the opportunity to build faster modulators.
引用
收藏
页码:249 / 252
页数:4
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