The physical and reliability characteristics of strained-Si0.8Ge0.2 MOS capacitor and strained-Si0.7Ge0.3 MOSFET with Hf-based gate dielectrics prepared by atomic layer chemical vapor deposition are investigated. The thickness and composition of the gate dielectrics are measured by high-resolution transmission electron microscopy and X-ray photoelectron spectroscopy, respectively. The gate leakage current and interface traps of HfO2/Si1-xGex gate structure are slightly higher as compared to the HfO2/Si MOS devices, which is basically caused by the Ge at the interface. The electrical properties of both HfO2/Si and HfO2/Si1-xGex devices can be improved with increasing PDA temperature up to 800 degrees C, which is due to the thicker interfacial layer grown at the interface, even though crystallization also grows with increasing temperature. However, with higher PDA temperature (> 800 degrees C), serious crystallization of HfO2 film causes more bulk traps induced electrical degradation. The electrical stress induced degradation of Si1-xGex substrate is slightly higher as compared to the control Si, due to more traps generations at the HfO2/Si1-xGex interface. For MOSFET, strained-Si1-xGex can effectively improve the drain current for about 20% at saturation and 69% at linear region. The higher gate leakage (J(g) similar to 1.4 x 10(-9) A/cm(2) at 2 V) and lower breakdown voltage (BD similar to 3.1 V) of Si0.7Ge0.3 pMOS devices are observed as compared to control Si devices (J(g) similar to 7.9 x 10(-12) A/cm(2) at 2 V and BD similar to 7.4 V). After the electrical stress, the degradation of drain current and transconductance and the shift of threshold voltage for Si1-xGex PMOSFET are larger than those for control Si devices, implying Ge induced trap generation at the Hf-silicate/Si1-xGex interface.