Design of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications

被引：0
|
作者：
dos Santos, Rodrigo Bispo [1 ]
Rocha Rizol, Paloma M. S. [1 ]
Mesquita, Leonardo [1 ]
机构：
[1] Univ Estadual Paulista, Sao Paulo, Brazil
来源：
2015 IEEE 6TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS & SYSTEMS (LASCAS) | 2015年
关键词：
component; Multiplier/divider; Type-2 fuzzy logic; Interval type-2 fuzzy logic controller;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35 mu m technology through Pspice software using a single supply voltage of 1.8V.
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页数：4
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